From the piece:
“Until now, people have believed that once an FPGA is full it cannot accommodate any more. If you want new functionality in this case, you have to completely rebuild the hardware, which is expensive,” says Oscar Gustafsson, senior lecturer in the Department of Computer Engineering at Linköping University.
But Carl Ingemarsson, a PhD student at the department, had other ideas. As an undergraduate several years ago, he was challenged to increase the speed of calculation in an FPGA. If the lab group could manage to reach a frequency greater than 450 MHz, they wouldn’t have to carry out the final lab in the course.
“This was what was needed to convince me to examine in depth the way the logic is represented inside the chip,” he says.
He achieved the frequency, skipped the final lab, and at the same time laid the foundation for his doctoral project. The result is that FPGAs today can be made to work five times as fast, or to deal with five times the number of calculations. While it’s true that Carl has only confirmed this in two families of FPGA, there is no reason to believe that it is not also the case for all other families.