The FPGAs in F1 have DDR4s interfaces attached to it - how can we access them from our go kernels?
The memory described as “shared memory” in the docs is in fact the card’s DDR4. For instance the memcopy example reads from one section of DDR4 into RAM on chip, then writes that data back out to a different area of DDR4. You can allocate your own area if you like that isn’t shared with the host so long as you perform the allocation in the host code and pass a pointer to the kernel.
In case it’s helpful, this tutorial provides some guidance on accessing the shared memory: http://docs.reconfigure.io/tutorial_3_structure_comms.html.